Characterizing carrier transport in silicon thin film metal semiconductor metal structures
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[ACCESS RESTRICTED TO THE UNIVERSITY OF MISSOURI AT AUTHOR'S REQUEST.] Due to its operational simplicity and ease of fabrication, metal semiconductor metal thin film structures have been the focus of attention for many researchers, specifically in studies related to the development of optoelectronic devices. In this study, extensive three dimensional simulations and analysis of thin-film silicon structures have been carried out to observe and interpret the physics of charge transport in scaled down devices. The interpretation of the results is expected to provide an insight into the underlying physics of current conduction in a nano structured thin film devices, specifically under the illumination of 365 nm wavelength beam at 1.132 W/cm2 power. In the study, the thin film active layer thickness has been successively reduced from 190 nm to 15 nm, in order to study the mechanics of charge transport in constricted channel regions. In the initial analysis, a fully isolated nanostructure metal semiconductor metal photo-detectors on the substrate was simulated. This was followed by study of partial and non-isolated nanostructure devices. The current-voltage (I-V) relationship was investigated for each of the structure for different film thickness along with the photo-generation rate, conduction current density, and electric field. It was observed that the I-V characteristics of the scaled down structures depend greatly on the lateral and transverse electric field components in the channel, which eventually determines the carrier mobility. Thus the choice of the correct mobility parameters, specifically the physical models like parallel and perpendicular field dependent mobility, concentration dependent mobility and various scattering effect inherent in the mobility models needs special consideration as the device dimensions are scaled down. Results show that by reducing thin film layer, conduction current density also decreases. This is due to the influence of the transverse electric field, velocity saturation, and high lateral electric field near metal contact. This study also shows that simulation of semiconductor devices using TCAD tools is a powerful and cost effective method for the analysis of devices, which helps us understand the responses of device without incurring any fabrication costs.
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