Shallow trench isolation process in microfabrication for flash (NAND) memory

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Shallow trench isolation process in microfabrication for flash (NAND) memory

Please use this identifier to cite or link to this item: http://hdl.handle.net/10355/5622

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Title: Shallow trench isolation process in microfabrication for flash (NAND) memory
Author: Garud, Niharika
Date: 2008
Publisher: University of Missouri--Columbia
Abstract: Technology is steadily advancing where semiconductors and microelectronics have become such a huge source of revenue and area of technological interest, resulting in reduced device geometries and more complicated microelectronic fabrication methods. In this thesis, high density plasma oxide process has been discussed, which is widely used especially for shallow trench isolations on micro and nano-sized devices. The problem discussed here relates to the process and how it can be easily imbalanced due to inaccurate assumptions and process parameters. Etch-outs, as presented in this thesis, are the root cause of the problem and a model demonstrating various correlations with some noteworthy results has been developed.
URI: http://hdl.handle.net/10355/5622
Other Identifiers: GarudN-042808-T9779

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