Novel Non Precharging Single Bitline 8T Static Random Access Memory

Abstract

Novel 8T SRAM design, employs individual bit-line (BL) and word-line (WL) for each operation. The read operation uses read word-line (RWL) and read bit-line (RBL) respectively. On other hand the write operation employs write word-line (WWL) and write bit line (WBL). Due to single BL and WL the power consumption of the proposed 8T SRAM cell is significantly less.The proposed design avoids the stability and reliability issues of the conventional 6T and other existing SRAM cells. The read stability and the write ability of the proposed design are better compared to the standard 6T and other 7T, 8T and 9T SRAM designs. The proposed 8T SRAM is as good as the 10T design without the overheads. The power consumption of the proposed 8T SRAM cell is significantly lower than other SRAM cells. The proposed design is ratio-less, which makes the construction and operation of the proposed SRAM much simpler and the response time much faster. The proposed cell design and its reliability and stability have been analyzed for 45nm technology. We have also analyzed the static noise margin (SNM) and the stability of the proposed design. In this analysis, we have used three methods. First, the traditional SNM method with the butterfly curve is introduced. Second, the N-curve method is used. And finally, we used the bit-line voltage method. We have also analyzed the impact of some process and parametric variations. The write ability of the proposed design is also compared to that of the conventional 6T SRAM.